December 2, 2022


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Automotive-Grade Silicon Carbide Power MOSFET Reliability Issues

Power electronics have grown in popularity over the last two decades as a result of the decentralized nature of green energy production, storage, and consumption, which necessitates many more intermediate conversions than traditional fossil fuels.

Wind energy generation is one example of a power electronics application. In such an application, supply reliability/security is an inherent issue, as are challenges related to efficiency, energy cost, converter volume, and converter protection. Such systems are typically more complex than fuel-powered generators, necessitating special control efforts such as active- and reactive power management, grid resiliency, and condition monitoring.

Due to the increasing number of energy conversions required to operate a modern hybrid or full-electric vehicle, high-power modules are becoming increasingly popular in the automotive industry. The battery charger, motor drive, and auxiliary services converter are the three main converters that are typically required. 

Higher frequency is a key challenge here, driven by the desire for lower volume and greater efficiency. Higher operating temperatures and higher robustness, i.e. longer lifetime, short-circuit- and over-current withstanding capability, are also significant challenges that often necessitate highly customized and integrated solutions.

Silicon carbide (SiC) has long been recognized for its mechanical properties, particularly its hardness, which is second only to diamond in nature. As a semiconductor, SiC outperforms traditional silicon in terms of bandgap, breakdown electric field, saturation velocity, and thermal conductivity, making it a strong contender to compete with silicon in the power electronics arena.

In the next four years, the   SiC driver market will grow at a CAGR of 40%. There are numerous players in the field, including CREE/Wolfspeed, ROHM, ST, and Infineon, and nearly all power electronic component manufacturers have SiC devices in their portfolios.

Figure 1: A typical power MOSFET chip structure. The drain contact is on the back side (not visible in the picture).
Structure of a typical power MOSFET chip. The drain contact is located on the backside (not visible in the picture).

According to Yole Développement’s latest market forecast, the automotive market will drive both technological and market development in power electronics over the next decade. Automotive-grade components have an expected operating life of around 15 years or 300,000 km, which translates to 10,000 operation hours. It is critical to test for reliability in such a demanding situation.

 SiC MOSFET Power-cycle Testing

There are two basic approaches to power-electronic component packaging: discrete packaging and module packaging. The first has no electrical isolation and thus requires an external isolation layer, whereas the second has a direct-bond copper (DBC) or substrate that provides this feature.

Another significant distinction is the isolation filler, which is typically transfer-molding resin in discrete packaging and silicone gel in modules, though some alternative solutions may be found, particularly in custom designs. In either case, one or more semiconductor devices (“chips”), which are the heart of the power electronic device, are present.

A chip has a sandwich-like structure, with a metal top layer serving as the source contact and a silicon bottom layer serving as the drain contact. The bottom layer is glued to the substrate with solder paste or, more recently, with a silver-sintered layer. Metal bond wires are commonly used to connect the top layer.

Figure 2: Wafer price per area of several semiconductor materials for power electronics [7].
Several semiconductor materials’ wafer prices per area in power electronics.

Figure 2 depicts the cost per square inch of modern semiconductor materials. As previously stated, the SiC MOSFET price is still more than ten times that of silicon, limiting the development of devices based on this technology. 

Due to such constraint, component designers are forced to significantly reduce chip area, which has two additional consequences: a) a smaller area for bond-wire footprints, and b) a higher power density, resulting in a higher temperature swing. The two issues mentioned above are both related to packaging. On top of that, an issue inherent to the SiC semiconductor itself must be mentioned, namely that the larger bandgap necessitates a higher electric field at the gate oxide, which can cause electrical instabilities.

SiC MOSFET  degradation can occur at two different levels: packaging and semiconductor.

Packaging Degradation

As the semiconductor current density increases, so does the bond-wire current density. Figure 3 shows how a Kelvin-source connection is used to monitor the bond-wire voltage drop during power cycling to investigate such an effect.

Power-cycling tests were performed on two SiC-MOSFET modules, A and B, under the conditions shown in Table 1. The maximum and minimum temperatures, temperature swing, and timing were all kept constant. The only distinction was the load current. The findings indicate that the current density has an effect on the series resistance (see Table 2).

Despite the fact that all other testing parameters were held constant, the sample with the higher current showed a greater increase in series resistance.

Figure 3: Photograph (left) and schematic (right) of Kelvin-source connection for testing the bond-wire voltage drop during power cycling [8].
Kelvin-source connection (left) and schematic (right) for testing the bond-wire voltage drop during power cycling.
Test ParametersModule AModule B
Tj, max125 °C125 °C
Tj, min65 °C65 °C
ΔTj60 °C60 °C
tON/tOFF2s / 4s2s / 4s
Load current2412
Table 1.The conditions under which the effects of current density on bond-wire liftoff failure were evaluated.
0 cycles70k cycles0 cycles70k cycles
Std deviation0.511.130.340.87
Table 2. End-of-life series resistance of bond wires (around 70,000 cycles) for ILOAD = 12 A and ILOAD = 24 A.

Testing for Abnormal Conditions

High-reliability applications, such as renewable energy production, necessitate a life expectancy of 20 years or more. Random failures cannot be ignored at this time horizon. Random failures are caused by abnormal events that occur during the component’s lifetime, such as grid voltage ride-through, overloads, short-circuits, and lightning strikes.

Reliability Challenges of Automotive-grade Silicon Carbide Power MOSFETs Fig5
Power-cycling degradation curves of a commercial SiC MOSFET module with a maximum temperature of 175 °C. The voltage drop across the semiconductor chip is shown at the top. At the bottom is a voltage drop across bond wires.

One of the most difficult problems is short-circuit. Testing for short circuit events is dangerous because they frequently result in catastrophic failure. A protection circuit is required to prevent this and allow for post-failure analysis.

A direct current power supply VDC charges a capacitor bank CDC to the test voltage. The series protection consists of parallel-connected IGBT power switches that operate at the same time. The series protection is activated before the device under test (DUT) and deactivated immediately afterwards. As a result, in the event of a failure and loss of control, the amount of energy dissipated on the DUT is significantly reduced.

Since the timing must be fine-tuned on a fraction-of-a-microsecond scale, the test signals are generated by FPGA hardware. An oscilloscope is used to sample the waveforms, which are then saved to a computer.

Figure 6: Principle schematic of a setup for short-circuit testing of power semiconductors.
A basic schematic of a short-circuit testing setup for power semiconductors.

Figure 7: Short-circuit waveforms for a commercial 1.2 kV, 300 A SiC MOSFET module. Yellow: drain voltage [200 V/div]; Blue: drain current [1 kA/div]; Pink: gate voltage [5 V/div]. Time: [1 us/div]. [11]

Waveforms for a commercial 1.2 kV, 300 A SiC MOSFET module in short circuit. Yellow represents the drain voltage [200 V/div], Blue represents the drain current [1 kA/div], and Pink represents the gate voltage [5 V/div]. [1 us/div] time [11]

The rupture waveforms of a commercial SiC MOSFET after a 3-microsecond short-circuit event are depicted in the figure above.

In the experiment, the turn-off sequence appeared to be safe. However, about 2 microseconds after the device was turned off, there was a sudden increase in the drain current, indicating that an instability occurred and caused the device to be destroyed. A burnt spot on one chip was discovered during a post-failure analysis on the same unit. Figure 9 shows another set of waveforms as an example. A failure occurred during turn off in the second case.

The temperature dependence of the on-state characteristics is one possible explanation for such phenomena. Figure 10 depicts a superimposition of the characteristics from the datasheet of the commercial device used in the tests at two different temperatures. Low gate voltages, for example, SiC MOSFETs with VGS = 10 V have a negative thermal coefficient, which means that current increases as temperature rises.

Although such a low voltage level is unusual in normal operation, it may occur if a significant current is triggered through the gate oxide due to a high temperature, resulting in an electro-thermal instability.

A post-failure analysis was performed at much lower short-circuit energies to prove the above hypothesis, so that the device under test was not severely damaged. The observation revealed clear evidence of a crack propagating through the field oxide and potentially leading to a conductive path between the gate terminal and the source metallization.

Status and Prospects

The cost of SiC MOSFETs in power-electronics applications is undoubtedly a major impediment to their widespread adoption. A lower cost would imply gaining one more degree of design freedom. The chip area may no longer be a constraint, allowing full utilization of the SiC material potential, particularly in terms of reliability.

Without a doubt, the second barrier is the temperature. Despite high expectations, the majority of operations are still limited to Tj, max = 150 °C. A 200 °C stable operation is required to conquer the automotive market (worth 1.5 B$, CAGR 3.4% in 2017 [13]).

The third barrier is the development of new interconnection concepts. Temperature swing has also become an issue at the solder layer. To enable the transition to SiC technology, new and low-cost concepts are required.

Figure 8: Post-failure analysis on a commercial SiC MOSFET module after a short circuit test, showing a burnt spot on a chip.
Following a short circuit test, a post-failure analysis of a commercial SiC MOSFET module reveals a burnt spot on a chip.

The scenario, on the other hand, is highly dynamic. As previously stated, Cree, the world’s first SiC wafer manufacturer, invested $1 billion in a new wafer fab in May 2019 [5]. Danfoss’ portfolio has been expanded with the addition of Danfoss Bond Buffer® technology (copper wire bonding). Major changes are still to come in the next 2-3 years.